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ADVISORY/Altera Accelerates SOPC Development With New Quartus II Design Methodologies at DAC!

  • (BUSINESS WIRE)--

    -0-

    What:   ALTERA showcases new design methodologies that provide
            designers the ability to control place-and-route, automate
            intellectual property (IP) integration, and optimize the
            workflow for ARM®-based Excalibur(TM) embedded processor
            implementations.
    
    When:   DESIGN AUTOMATION CONFERENCE
            June 18-22, 2001
    
            Exhibit Hall Hours are:
            June 18 - 10:00 am-6:00 pm (Monday)
            June 19 - 10:00 am-6:00 pm (Tuesday)
            June 20 - 10:00 am-6:00 pm (Wednesday)
    
    Where:  LAS VEGAS CONVENTION CENTER
            ALTERA BOOTH No. 2700
            3150 Paradise Road
            Las Vegas, NV 89109
            For additional show information visit: http://www.dac.com/
    
    In-Booth Demonstrations:
    
            Quartus® II version 1.1 -- LogicLock Incremental Design
            Capability for design performance preservation.
            Mercury Devices -- On-board demonstration of Clock-Data
            Recovery (CDR) technology capable of speeds up to 1.25 Gbps
            per Channel.
            MP3 Nios-Based Excalibur Demo -- A Multiprocessor Design
            Performing MP3 Decode and Playback Using Hardware
            Acceleration in Programmable Logic.
            ARM-Based Embedded Processor -- Integrated hardware and
            software demonstration.
    

    Contact:
         Altera Corporation
         Bruce Fienberg, 408/544-6866 or 415/577-5696 at DAC
         bfienber@altera.com
         Ami Dorrell, 408/544-6879
         adorrell@altera.com
         or
         PR21
         Matthew Stotts, 415/369-8117
         matthew.stotts@pr21.com

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  • Copyright 2001, Internet Business Systems, Inc.
    1-888-44-WEB-44 --- marketing@ibsystems.com